P0.45 Design Scheme of RGB LED Full-color Screen

introduction

Core features of the patented technology of the invention:

â‘  The two electrode pads of the wafer are arranged on the two diagonal circular missing side walls, and the pad spacing and area are large; â‘¡ Multilayer structure to reduce the spacing between wafers in the same layer.

This paper summarizes the key technical points of the invention, introduces and analyzes the technical scheme of P 0.45 and P 0.9 RGB display screens and P 0.4 backlight. Mass production can be realized by using existing mature technical methods and equipment.

Technical overview

The technical barriers of mini / Miro LEDs with small spacing come from:

â‘  The LED chip size is too small (the electrode pad spacing is too small and the area is too small); â‘¡ The next door neighbor is too close (too close). Welding of tens of millions of pads, yield (cost).

1. Core features of the patented technology of the invention

(A) The two electrode pads of the wafer are arranged on the two diagonal circular missing side walls.

The array is provided with a plurality of chip sockets, and the LED chip is embedded in the chip socket. A connecting pad is arranged on the two corresponding diagonal side walls of the wafer insert, and the two electrodes are welded with solder paste.

(B) Multilayer wafer carrier structure.

The above figure (cross-sectional view) shows that there are three layers, so the wafer density of each layer is only one third, and the distance between wafers increases. The three layers are R layer, G layer and B layer respectively, forming a full-color display screen.

2. Analysis and description of technical advantages:

(A) The two electrode pads are arranged on the two diagonal circular missing side walls, (1) the spacing between the two electrode pads on the wafer may be increased at most; (2) The area of electrode pad is increased by using the side wall, which is conducive to welding.

The LED chip is embedded in the chip socket, and the two electrodes are welded with solder, (1) there is no gold wire, (2) the two electrodes are easy to be firmly welded, (3) it is easy to repair the defective chip and solder joint (as shown in the right figure). Therefore, 100% yield is easy to achieve.

(B) Multilayer wafer carrier structure, the wafer carrier is equipped with thin film transistor (FTF), (1) the distance between wafers is increased, which avoids the interference between electrode welding lines of adjacent wafers and is conducive to reducing pixel spacing, (2) the carrier welded with LED wafer (hereinafter referred to as LED single-layer wafer) is an independent diaphragm (which can be designed to be not associated with other wafers), It can be powered on separately for test and repair. After passing the test, it can be integrated with other LED single-layer chips to achieve 100% good products.

P 0.45 RGB LED full color screen design scheme

1. 0.2x0.2 LED chip

0.2x0.2 is a conventional LED chip. The difference is only the diagonal gap, and the electrode pad is arranged on the side walls of the two gaps. Laser drilling and hole wall metallization are conventional technologies.

2. Wafer carrier

The thickness of the wafer carrier is consistent with that of the LED wafer (0.1mm). Laser drilling, hole wall metallization, flexible material and thin film transistor (TFT) are all conventional technologies.

3. Insert the wafer into the wafer socket (crystallizing)

The dimension of the wafer insert is 0.26x0.26, and there is a gap of 0.03 around the wafer and the wafer insert, that is, the precision error of crystallization is ± 0.03, which belongs to the conventional precision.

4. Electrode pad solder paste welding

Screen printing or ink-jet spraying of solder paste is adopted. The area of solder paste coating is as large as possible. The surface tension of liquid tin is used to condense and penetrate into the gap between the two pads. Therefore, the allowable error of solder paste positioning is increased. In the above design, the allowable error of solder paste positioning is ± 0.1mm, which belongs to the conventional technical requirements.

Apply excess solder paste and remove excess solder with air blowing or tin suction roller, which is easier to ensure welding and reduce accuracy requirements.

The equipment, technology and process involved in the above scheme are conventional.

5. RGB three-layer splicing

The epitaxial layer of the first layer (layer 1) faces backward, similar to the so-called flip chip, and the epitaxial layers of layer 2 and layer 3 face forward. The figure shows that the RGB three-layer wafers are partially stacked between the front and rear.

The RGB LED full-color screen of P 0.45 can be realized by using conventional equipment, technology and process.

Before splicing, each single layer has been tested and defect repaired. Therefore, 100% yield can be easily obtained.

P0.4 backlight design scheme

The LED chip specification also adopts 0.2x0.2.

The size of the wafer insert is 0.28x0.28, and there is a gap of 0.04 around the wafer and the wafer insert, that is, the precision error of crystallization is ± 0.04, and the precision requirements are reduced.

Only two layers of LED single-layer disk (wafer carrier chip) are required. The epitaxial layer of layer 1 faces back and layer 2 faces forward. The fluorescent layer can be set by silk screen printing or sticking fluorescent diaphragm.

Before splicing, each single layer has been tested and defect repaired, so 100% yield can be easily obtained.

P0.9 design scheme of RGB LED full-color screen

The LED chip specification also adopts 0.2x0.2. RGB three chips are in the same layer, that is, only one chip carrier is adopted, and the three chips have common wiring pads.

There is a gap of 0.04 around the chip and the chip insert, and the precision error of crystal striking can be within ± 0.04, which is conventional technology.

The chip carrier is not provided with TFT, but is provided with a driving PCB board, the chip carrier is provided with an external bonding pad, and the driving PCB board is connected with the corresponding bonding pad, Φ For pads with a diameter of 0.2, the dislocation error of the upper and lower pads is allowed to be 0.1mm, which is conventional technology.

Before welding with the driving PCB board, the wafer carrier with the wafer welded has completed the testing and defect repair process, so the yield is 100%.

Post order and statement

The RGB LED full-color display of P 0.45 can fully meet the needs of 4K large screen TV. According to the patented technical scheme design of the invention, using the current conventional technology and equipment, it can achieve 100% yield, effectively reduce the cost and solve the problem that the price affects the market. Hundreds of billions of big markets will be detonated.

The above display belongs to mini led. The patent of the invention can also greatly reduce the cost of large spacing LED display screen, and will also subvert the process of large spacing LED display screen.

The patent of the invention will promote the development of LED display, backlight and panel industry into a new era. The biggest benefit is the LED epitaxial wafer factory with serious overcapacity.

Here, it is specially declared that the LED chip structure shown above must be licensed within the protection scope of the invention patent (invention patent No.: zl20101055508.6, ten years ago).

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